Contemplating that the Serial Peripheral Interface bus semi-standard has been round because the early Nineteen Eighties, it’s maybe not that surprising that the controllers of the Tremendous Nintendo Leisure System (SNES) would take no less than some robust design hints for the used protocol. This does nonetheless increase the query of precisely how appropriate a SNES controller is when related to the SPI grasp peripheral of any random MCU. Lately [James Sharman] got down to reply this query decisively.
The impetus for answering this query got here after [James] designed a separate SNES controller board for his homebrew pc system, which led to many feedback on that video saying that he may simply have hooked the controller as much as the SPI board in mentioned homebrew system.
Right here the brief reply is that the SNES controller protocol may be very near SPI Mode-1, with the same association of clock/information/chip choose (latch) traces and clocking. For those who consider the SNES controller as an SPI machine with only a MISO line, you’re principally there already. The one niggle that popped up was that the ‘MISO’ line doesn’t get pulled right into a high-impedance state when the active-low latch connection is pulled excessive.
This was fixable by introducing a 74HC125 tri-state buffer IC, after which each the unique SD card and twin SNES controllers could possibly be used concurrently.
